Walking skeleton + Intrinsics blocker

Goal

Stand up one end-to-end vectorized path through every phase, gated on the Intrinsics substrate, and record the hard blocker.

Implementation Sketch

A single element-wise float map (panic-free, primitive lane) flows parser-attr -> typeck -> ARC gate -> LLVM vector lowering -> eval scalar-parity. Nothing else lands until this skeleton is green behind the Intrinsics-availability check.

Spec References

Proposal §0 three-layer model; §6 parity contract.

Work Items

• Stand up the end-to-end skeleton: one element-wise float map (panic-free, primitive lane) vectorizes through parser-attr passthrough, typeck, the ARC gate, LLVM vector lowering, and eval scalar-parity, gated behind an Intrinsics-substrate availability check.
• Record the HARD BLOCKER prominently: the Intrinsics capability (intrinsics-capability + intrinsics-v2-byte-simd) is approved but implemented in ZERO backends (no ori_types/ori_eval/ori_llvm; trait missing from library/std/prelude.ori). Auto-vec cannot lower until it exists, including a horizontal-reduce primitive (simd_reduce_min/max/and/or/xor) the approved v2 surface does not define.