Prior-Art Ingestion (layer-1 prework)

Goal

Create a scoped, clean-room evidence set for VM design decisions without turning parser infrastructure into an unbounded prerequisite. The deliverable is an evidence classification and experiment backlog, not an architecture adoption: its spine is the semantic/physical split (ExecutableProgram frozen post-AIMS facts, BytecodeProgram verified typed operations, PhysicalVmPlan disposable projection), and lane leakage between those levels is rejected. This target owns provenance only — it produces extractor fixtures, pins, and evidence tables and cannot preempt the realization, execution, ISA, or parity owners that own behavior.

Implementation Sketch

• Add only the C/Lua extractor support required by the selected source directories, with pinned grammars, parser samples, and query-family validation.
• Ingest scoped interpreter/runtime directories from LuaJIT, Lua, CPython, QuickJS, wasm3, and mruby. Record repository revisions and non-zero symbol counts so later claims are reproducible.
• Review LuaJIT .dasc dispatch sources directly because the graph cannot represent them; record that evidence separately rather than substituting wasm3 and claiming LuaJIT coverage.
• Pin direct local-source studies of V8 and GHC beside LuaJIT. Keep graph-ingestion scope and design-study scope distinct when a repository or language is not represented by the extractor.
• Produce a short decision table covering dispatch, instruction encoding, frames, errors, GC/RC boundaries, and portability. Each later design section cites the rows it actually uses.
• Time-box reconnaissance. Missing graph richness may narrow a claim, but it must not silently expand into an unrelated intelligence-platform project.

Spec & Rules

• Influence only; copy no implementation code.
• A declared parser query family must either have a validated query or an explicit unsupported disposition.
• Record exact repository revisions and source paths, including the DynASM blind spot.
• Classify evidence as strict interpreter, JIT/tiered, compiler/lowering, or runtime architecture. Never use evidence from one lane to support a claim in another. Each lane carries permitted pressures and prohibited conclusions; a permitted pressure never licenses its prohibited conclusion.
• Prior art exempts no hygiene family — PHASE/FLOW, TEST/COVER, SPEC, SSOT, WASTE, DESIGN, and INTEL rules all bind evidence ingestion, extractor authoring, and every derived hypothesis.
• Architectural non-fallback constraints hold regardless of graph gaps: the DynASM blind spot is direct-review evidence, never graph coverage; the tree-walker and LLVM backends are not VM fallbacks; and physical planning is not a semantic owner.
• No pre-existing external symbol is a do-not-touch constraint (the graph reports an empty constrained-symbol set); the binding constraints are architectural, not symbol-level.

Live LuaJIT Reconnaissance — 2026-07-14

The official rolling LuaJIT repository is cloned read-only at ${REFERENCE_REPOS_ROOT}/lang_repos/luajit and pinned for this prototype study at 3c4f9fe2052b8d08a917ac0d5f38563f0297b5a3. Directly inspected evidence includes src/lj_bc.h, src/lj_obj.h, src/lj_frame.h, src/lj_dispatch.c, src/lj_dispatch.h, src/lj_parse.c, and src/vm_x64.dasc.

The .dasc interpreter remains direct-review evidence rather than graph-derived evidence.

What -joff means

• src/luajit.c::runargs accepts the joined -joff spelling as the -j control command off; src/luajit.c::dojitcmd resolves that command to src/lib_jit.c::jit_off, which calls luaJIT_setmode(..., LUAJIT_MODE_OFF).
• In a fresh comparator process, apply -joff before loading the benchmark and assert that the benchmark does not re-enable the JIT. The Lua bytecode then runs through LuaJIT’s interpreter; no trace is recorded or entered.
• -joff does not mean PUC Lua, a generic C interpreter, or “JIT with optimizer flags reduced.” It retains LuaJIT’s BCDEF bytecodes, parser shaping, tagged TValue slots, register-window frames, and DynASM-generated architecture-specific interpreter.
• src/lj_dispatch.c::lj_dispatch_update selects the non-hotcounting interpreter handlers when the JIT mode is off. src/lj_trace.c::trace_stop patches bytecode to J-forms such as BC_JLOOP; that mechanism is JIT-only and is excluded from all -joff evidence.
• Use pinned LuaJIT -joff only as the strict-interpreter speed and memory north star. Record LuaJIT JIT-on results, trace patching, hot counters, exits, and machine-code behavior only in the separately labeled tiered/JIT lane.

An out-of-tree build copied to /tmp produced LuaJIT 2.1.1783773675. On the output-checked 100-doors workload with 200 outer iterations, thirty shell-free whole-process runs measured pinned LuaJIT -joff at 2.1 ms ± 0.2 ms and Python 3.12.3 at 18.0 ms ± 1.0 ms: LuaJIT was 8.49× faster.

This is the current machine-local north-star reading, not yet the frozen cross-machine benchmark record. The equivalent programs preserve workload and output, while language-specific table/list update semantics are recorded rather than assumed identical.

Pinned Local-Source Evidence Matrix — 2026-07-14

External clean-room prior art — 2026-07-14

Web-fetched sources are clean-room performance pressures, never implementation templates. Each is classified by lane and transfer judgment (V8 Ignition is already covered above as a pinned local source).

Clean-room boundary by source

• LuaJIT: do not copy opcode order/numbers, BCDEF rows, DynASM, handler bodies, dispatch tables, TValue, pointer-tagged frames, parser folds, GC/table semantics, trace patching, or exit machinery.
• V8: do not copy bytecode lists, operand encodings, Ignition handlers, accumulator conventions, JavaScript feedback slots, tagged-value rules, inline caches, sandbox ABI, or generated-code machinery.
• GHC: do not copy BCInstr, BCO encodings, stack-machine layout, StgBCO, lazy/thunk evaluation policy, RTS GC conventions, computed-goto tables, remote-link protocol, or loader/runtime object construction.
• Ori: derive every opcode, value, frame, ownership, verifier, physical-layout, and tier decision from the Ori spec, closed ExecutableProgram, post-AIMS ARC, representation facts, real profiles, and parity tests. Preserve only abstract pressures and independently testable hypotheses.

Ori Synthesis: Semantic Bytecode Before Physical Execution

Use this as a prototype architecture hypothesis, not a frozen API:

ExecutableProgram
    -> BytecodeProgram
    -> immutable VerifiedBytecode
    -> pure, discardable PhysicalVmPlan
    -> VmSession::execute

• Every ingested prior-art row maps to exactly one ownership level — artifact closure (ExecutableProgram), bytecode semantics (BytecodeProgram/VerifiedBytecode), or physical execution (PhysicalVmPlan). Blending levels is a PHASE/SSOT hazard.
• VerifiedBytecode owns semantic instructions, CFG/call validity, type/representation proofs, exact ARC/AIMS expansion, source/effect/error order, resource ceilings, and an immutable identity.
• PhysicalVmPlan owns only host execution choices: packed versus predecoded records, immediate forms, copy-coalesced register placement, handler/block layout, and accepted portable tracelets. It is derived purely from one VerifiedBytecode identity and cannot add, remove, reorder, or rediscover semantics.
• VmSession owns all mutable execution state, dynamic values/handles, frames, heap, limits, output, counters, and cleanup. Neither verification nor physical planning owns run state.
• A future JIT consumes the same verified region facts and explicit state maps through ori_engine; it does not turn PhysicalVmPlan into a hidden native fallback. Interpreter-only runs create no runtime machine code and perform no tier transitions.
• Cache semantic verification and physical planning under separate versioned identities. A physical plan is always reconstructible and disposable; serialized semantic bytecode never becomes host-layout-dependent.

Falsifiable prototype implications

The unified-declaration hypothesis (row 1) is admitted only when both endpoint sources prove duplicate semantics; no MISSING_ABSTRACTION is confirmed today, so distinct typed facts are retained rather than fused, avoiding SSOT drift. Its verification adds pins at the semantic-to-physical boundary (BytecodeProgram to PhysicalVmPlan), not only handler microtests.

These hypotheses combine LuaJIT’s strict-interpreter locality, V8’s declarative physicalization, and GHC’s explicit readiness stages with Ori’s static types and AIMS proofs. The proposed combination is Ori-owned and must earn promotion through real compiler execution, broad correctness/parity, speed, memory, and seam evidence; analogy is never sufficient.

The evidence matrix and hypothesis tables are a backlog, not an adopted architecture. Each hypothesis must be prototyped in the real ori_vm path, compared with the same unfused baseline on a non-singleton workload set, and classified as promote, revise, or reject.

Promotion requires repeatable macro improvement, evaluator/VM/compiled-consumer behavior parity, post-AIMS ownership-event parity, verifier coverage, clean seam fit, and acceptable portability/maintenance cost. Combining rows is allowed only when the combined variant is measured independently; improvements are not assumed additive.

All prototype and production code remains independently authored from Ori’s contracts. Prior art may identify a performance pressure or an experiment; only Ori semantics, measurements, parity tests, and hygiene gates can justify the resulting design.

Clean-Room Decision Matrix — 2026-07-14

• Pinned revisions: LuaJIT 3c4f9fe2052b8d08a917ac0d5f38563f0297b5a3, V8 d8b528eda51e69585a4fec7ef1cb2420cce45e7d, GHC 4396a6f2a4c7799908e1e0b88a218a51d063fdca.
• LuaJIT src/vm_x64.dasc is the DynASM graph blind spot — direct-review evidence only, never extractor/graph coverage.
• Evidence-lane values classify the SOURCE evidence per Spec & Rules (strict interpreter / JIT-tiered / compiler-lowering / runtime-architecture); one lane’s evidence never supports another lane’s conclusion.
• Ori artifact owners are the Ori Synthesis levels (ExecutableProgram frozen post-AIMS facts, VerifiedBytecode semantic instructions, PhysicalVmPlan disposable projection, VmSession run state).
• Each row states its evidence lane, exact inspected paths, Ori artifact owner, non-adoption boundary, falsifiable hypothesis, and the four-axis promotion-or-rejection evidence later sections must produce.

Each category row above is consumed under the strict/tiered permitted lane, consuming section, and rejection gate recorded in Downstream Consumer Registration; the two tables never restate one another. A category whose promotion/rejection evidence is not produced by its registered consuming section is unfunded prior art and is dropped, not carried as latent adoption pressure.

Downstream Consumer Registration

Each decision-matrix row is consumed by concrete downstream bytecode-vm sections under exactly one permitted lane; the rejection gate blocks any consumer from authorizing strict-lane mutation, a second semantic owner, or a benchmark-specific shortcut. strict = the immutable strict-interpreter lane; tiered = the separately measured tier/JIT lane.

Traceability: each listed downstream section cites the rows it actually uses; a row with no registered consumer is unfunded prior art and is dropped, not carried as latent adoption pressure. This registration owns provenance only; the executable, ISA, dispatch, and parity sections it hands rows to own behavior — a STRUCT/PHASE boundary the registration must not cross, and it never blocks a semantic-closure repair. prototype-retirement-and-production-hardening (s-7992d69b) is the terminal gate that deletes any prototype residue a registered row did not promote.

Layer Coverage

Work Items

• Add only the C/Lua extractor capability required for the declared VM-source directories; pin each grammar, validate every declared query family with positive and negative parser fixtures, and record an explicit unsupported disposition for any family not implemented.
• Register and ingest the scoped, revision-pinned interpreter/runtime directories of LuaJIT, Lua, CPython, QuickJS, wasm3, and mruby; for every repository record exact paths, evidence lane, and VM-design question, and prove non-zero useful graph symbols while retaining explicit unsupported dispositions rather than substituting unrelated coverage.
• Record the LuaJIT .dasc graph blind spot; directly inspect pinned LuaJIT, V8, and GHC sources; and publish a revisioned clean-room decision matrix for dispatch, encoding, frames, errors, GC/RC boundaries, and portability. Each row must state its evidence lane, exact paths, Ori artifact owner, non-adoption boundary, falsifiable hypothesis, and the speed, memory, parity, and portability promotion or rejection evidence required by later sections.
• Register the concrete downstream benchmark, architecture, ISA, bytecode-compiler, and dispatch sections that consume each decision-matrix row, including the permitted lane and rejection gate, so prior-art influence remains traceable and cannot authorize strict-lane mutation, a second semantic owner, or benchmark-specific shortcuts.

Intel dossier — pointer and tier disposition

Dossier: prior-art-ingestion--s-fa0fd48c.intel.md (this section’s content/intel/ sidecar)

Read that dossier from line 1 through EOF before acting on this section. This block is a pointer and an audit record, never a substitute: not the BLUF, not a summary, not selected tiers.