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s14 — ABI Obligations: FFI, Atomics/TLS, Inline-Asm Policy, WASM Glue

Goal

The remaining target-ABI obligations matrix closes: C FFI calling conventions per ISA (full aggregate/float rules, variadics), Deep-FFI surface (out params, [byte] elision, ownership), atomics policy, inline-asm policy record, and the WASM linear-memory/JS-glue ABI.

Implementation Sketch

  • Full C calling conventions per ISA beyond the s08/s09 subset: aggregate classification (SysV class algorithm, AAPCS64 HFA rules, RV64 2xXLEN rules, s390x by-reference rules, win64 shadow space), float/vector registers, struct-by-value both directions — consumed by extern “c” calls (spec Clause 26) and validated against C test shims compiled with the system cc.
  • C variadics (printf-class, unsafe-gated per spec): per-ISA va-call lowering.
  • Deep FFI: out params, owned/borrowed annotations, #error protocols, #free Drop wiring, [byte] -> (ptr,len) elision — emission parity with the LLVM backend per the platform-ffi proposal surface.
  • Atomics/TLS: RcAtomicity::Atomic is the only shipped mode (verified at plan time) — native RC ops use the same atomic orderings the runtime expects; document the non-atomic future (RL-19) as fact-surface-gated; TLS only if/where the runtime demands it (audit, likely none).
  • Inline-asm policy: DECISION RECORD only (Ori has no inline-asm surface; asm is a reserved future keyword) — the backend reserves an escape-hatch design but ships nothing.
  • WASM ABI: linear-memory exports (__ori_alloc/__ori_free), JsValue handle slab, JsPromise resolution points, JS glue + TS declarations parity with the existing wasm path (aot/wasm/ precedent), WASI posture.

Test Strategy

  • Matrix: FFI shape {scalar args, aggregates by-value both ways, floats, mixed, out-params, variadic, [byte] elision} x native ISA, validated by C shim round-trips (compile shim with cc, call across, assert bit-exact); wasm cells via JS host harness.
  • Semantic pin: per-ISA one aggregate-classification pin (a struct that classifies differently across ISAs lands in the documented registers/stack slots — disassembly-pinned).
  • Negative pin: an ABI-mismatch fixture (wrong classification, test-only) fails the round-trip, proving the harness detects miscompilation.

Work Items

  • Full per-ISA C calling-convention implementation (aggregate classification, floats, both directions) + C-shim round-trip harness.
  • Variadic calls + Deep-FFI surface (out params, ownership, error protocols, [byte] elision) at parity with the LLVM backend.
  • Atomics audit + RC atomic-ordering conformance; TLS audit; non-atomic-RC future recorded as fact-gated.
  • Inline-asm policy decision record (reserved escape hatch, nothing shipped).
  • WASM linear-memory/JS-glue/WASI ABI at parity with the existing wasm path; FFI matrix green incl. negative ABI pin.