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s08 — Walking-Skeleton Pathfinder: x86-64 Vertical Slice

Goal

The first real vertical slice: trivial-subset BIR lowers through x86-64 isel, a no-spill regalloc, and a real encoder into an object-crate .o, links against libori_rt.a, and runs — proving the BIR->MIR->emit->object->link->run chain on the pathfinder ISA. (Intra-milestone: the all-5 gate closes at s09.)

Implementation Sketch

  • MIR-x86_64 per s03 design (SoA), minimal instruction set covering the trivial subset: mov/imm, add/sub/imul, cmp/jcc, jmp, call (rel32 + PLT-shaped reloc), ret, push/pop frame.
  • Minimal isel: direct BIR->MIR lowering for the trivial subset via the ArchConfig surface (the FRAME is multi-target from day one — lower fns + register masks parameterized; only the x86-64 instance is filled here).
  • Minimal regalloc: greedy over the SysV GP set; the subset is chosen so no spills are required; frame layout (rsp alignment per SysV: 16-byte at call).
  • Encoder: x86-64 instruction encoding for the minimal set (REX/ModRM/SIB as needed); relocations: R_X86_64_PLT32 (calls), R_X86_64_PC32, R_X86_64_32S/64 (data) per the Roc-validated minimal set.
  • Object emission via object crate (.text, .rodata for string literals, symbol table, relocs); SysV calling convention for runtime calls.
  • End-to-end: s07 harness now drives REAL compiled programs — hello, integer arithmetic, branch, function call, print results.
  • Calling convention correctness for the subset: args in rdi/rsi/rdx/rcx/r8/r9, ret in rax; f64 in xmm0-7 (print_float).

Test Strategy

  • Matrix: program shape {straight-line, branch, call, multi-fn} x value type {int, float, bool, str-literal} — compile+link+run with stdout/exit-code asserted against the INTERPRETER output (parity from the first slice).
  • Semantic pin: a disassembly FileCheck-style test pins the call/ret + frame sequence for one known function (regression anchor for encoder churn).
  • Negative pin: a deliberately mis-encoded instruction fixture fails the encoder unit tests (encoder has byte-exact unit coverage per instruction form).
  • Debug AND release cargo profiles green.

Work Items

  • MIR-x86_64 types + ArchConfig instance (register set, masks, lower fns) for the trivial subset.
  • x86-64 encoder for the minimal instruction set with byte-exact unit tests per instruction form.
  • Minimal greedy regalloc + SysV frame layout (16-byte call alignment) for no-spill programs.
  • Object emission (.text/.rodata/symbols/relocs: PLT32, PC32, 32S/64) + link + run via the s07 harness.
  • Pathfinder matrix green with interpreter-parity stdout/exit-code assertions + disassembly pin + encoder negative pin; debug+release both green.